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Bug #1348 ยป vmxsvm.diff

Bryan Cantrill, 2011-08-07 10:33 PM

View differences:

usr/src/cmd/isainfo/isainfo.c
23 23
 * Use is subject to license terms.
24 24
 */
25 25

  
26
#pragma ident	"%Z%%M%	%I%	%E% SMI"
26
/*
27
 * Copyright (c) 2011, Joyent, Inc. All rights reserved.
28
 */
27 29

  
28 30
#include <sys/types.h>
29 31
#include <sys/systeminfo.h>
......
161 163
		int linecnt = 0;
162 164

  
163 165
		for (p = strtok(buffer, " "); p; p = strtok(NULL, " ")) {
164
			if (linecnt == 0)
165
				linecnt = printf("\t");
166
			linecnt += printf("%s ", p);
167
			if (linecnt > 68) {
166
			if (linecnt + strlen(p) > 68) {
168 167
				(void) printf("\n");
169 168
				linecnt = 0;
170 169
			}
170
			if (linecnt == 0)
171
				linecnt = printf("\t");
172
			linecnt += printf("%s ", p);
171 173
		}
172 174
		if (linecnt != 0)
173 175
			(void) printf("\n");
usr/src/common/elfcap/elfcap.c
21 21

  
22 22
/*
23 23
 * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
24
 * Copyright (c) 2011, Joyent, Inc. All rights reserved.
24 25
 */
25 26

  
26 27
/* LINTLIBRARY */
......
295 296
	{						/* 0x20000000 */
296 297
		AV_386_AVX, STRDESC("AV_386_AVX"),
297 298
		STRDESC("AVX"), STRDESC("avx"),
299
	},
300
	{						/* 0x40000000 */
301
		AV_386_VMX, STRDESC("AV_386_VMX"),
302
		STRDESC("VMX"), STRDESC("vmx"),
303
	},
304
	{						/* 0x80000000 */
305
		AV_386_AMD_SVM, STRDESC("AV_386_AMD_SVM"),
306
		STRDESC("AMD_SVM"), STRDESC("amd_svm"),
298 307
	}
299 308
};
300 309

  
usr/src/common/elfcap/elfcap.h
113 113
 */
114 114
#define	ELFCAP_NUM_SF1			3
115 115
#define	ELFCAP_NUM_HW1_SPARC		17
116
#define	ELFCAP_NUM_HW1_386		30
116
#define	ELFCAP_NUM_HW1_386		32
117 117

  
118 118

  
119 119
/*
usr/src/uts/common/sys/auxv_386.h
69 69
#define	AV_386_PCLMULQDQ	0x8000000 /* Intel PCLMULQDQ insn */
70 70
#define	AV_386_XSAVE		0x10000000 /* Intel XSAVE/XRSTOR insns */
71 71
#define	AV_386_AVX		0x20000000 /* Intel AVX insns */
72
#define	AV_386_VMX		0x40000000 /* Intel VMX support */
73
#define	AV_386_AMD_SVM		0x20000000 /* AMD SVM support */
72 74

  
73 75
#define	FMT_AV_386							\
74
	"\20"								\
75
	"\36avx\35xsave"						\
76
	"\34pclmulqdq\33aes"						\
77
	"\32movbe\31sse4.2"						\
78
	"\30sse4.1\27ssse3\26amd_lzcnt\25popcnt"			\
79
	"\24amd_sse4a\23tscp\22ahf\21cx16"				\
80
	"\17sse3\15sse2\14sse\13fxsr\12amd3dx\11amd3d"	\
81
	"\10amdmmx\7mmx\6cmov\5amdsysc\4sep\3cx8\2tsc\1fpu"
76
	"\020"								\
77
	"\040svm\037vmx\036avx\035xsave"				\
78
	"\034pclmulqdq\033aes"						\
79
	"\032movbe\031sse4.2"						\
80
	"\030sse4.1\027ssse3\026amd_lzcnt\025popcnt"			\
81
	"\024amd_sse4a\023tscp\022ahf\021cx16"				\
82
	"\017sse3\015sse2\014sse\013fxsr\012amd3dx\011amd3d"		\
83
	"\010amdmmx\07mmx\06cmov\05amdsysc\04sep\03cx8\02tsc\01fpu"
82 84

  
83 85
#ifdef __cplusplus
84 86
}
usr/src/uts/i86pc/os/cpuid.c
28 28
/*
29 29
 * Portions Copyright 2009 Advanced Micro Devices, Inc.
30 30
 */
31

  
31
/*
32
 * Copyright (c) 2011, Joyent, Inc. All rights reserved.
33
 */
32 34
/*
33 35
 * Various routines to handle identification
34 36
 * and classification of x86 processors.
......
155 157
	"aes",
156 158
	"pclmulqdq",
157 159
	"xsave",
158
	"avx" };
160
	"avx",
161
	"vmx",
162
	"svm"
163
};
159 164

  
160 165
boolean_t
161 166
is_x86_feature(void *featureset, uint_t feature)
......
1263 1268
	}
1264 1269
#endif	/* __xpv */
1265 1270

  
1271
	if (cp->cp_ecx & CPUID_INTC_ECX_VMX) {
1272
		add_x86_feature(featureset, X86FSET_VMX);
1273
	}
1274

  
1266 1275
	/*
1267
	 * Only need it first time, rest of the cpus would follow suite.
1276
	 * Only need it first time, rest of the cpus would follow suit.
1268 1277
	 * we only capture this for the bootcpu.
1269 1278
	 */
1270 1279
	if (cp->cp_edx & CPUID_INTC_EDX_CLFSH) {
......
1421 1430
			if (cp->cp_edx & CPUID_AMD_EDX_TSCP) {
1422 1431
				add_x86_feature(featureset, X86FSET_TSCP);
1423 1432
			}
1433

  
1434
			if (cp->cp_ecx & CPUID_AMD_ECX_SVM) {
1435
				add_x86_feature(featureset, X86FSET_SVM);
1436
			}
1424 1437
			break;
1425 1438
		default:
1426 1439
			break;
......
2566 2579
			    (*ecx & CPUID_INTC_ECX_OSXSAVE))
2567 2580
				hwcap_flags |= AV_386_XSAVE;
2568 2581
		}
2582
		if (*ecx & CPUID_INTC_ECX_VMX)
2583
			hwcap_flags |= AV_386_VMX;
2569 2584
		if (*ecx & CPUID_INTC_ECX_POPCNT)
2570 2585
			hwcap_flags |= AV_386_POPCNT;
2571 2586
		if (*edx & CPUID_INTC_EDX_FPU)
......
2653 2668
			hwcap_flags |= AV_386_AMD_3DNow;
2654 2669
		if (*edx & CPUID_AMD_EDX_3DNowx)
2655 2670
			hwcap_flags |= AV_386_AMD_3DNowx;
2671
		if (*ecx & CPUID_AMD_ECX_SVM)
2672
			hwcap_flags |= AV_386_AMD_SVM;
2656 2673

  
2657 2674
		switch (cpi->cpi_vendor) {
2658 2675
		case X86_VENDOR_AMD:
usr/src/uts/intel/ia32/os/archdep.c
962 962
	auxv_hwcap |= AV_386_AHF;
963 963
#endif
964 964

  
965
	if (auxv_hwcap_include || auxv_hwcap_exclude)
966
		cmn_err(CE_CONT, "?user ABI extensions: %b\n",
967
		    auxv_hwcap, FMT_AV_386);
965
	if (auxv_hwcap_include || auxv_hwcap_exclude) {
966
		/*
967
		 * The below assignment is regrettably required to get lint
968
		 * to accept the validity of our format string.  The format
969
		 * string is in fact valid, but whatever intelligence in lint
970
		 * understands the cmn_err()-specific %b appears to have an
971
		 * off-by-one error:  it (mistakenly) complains about bit
972
		 * number 32 (even though this is explicitly permitted).
973
		 * Normally, one would will away such warnings with a "LINTED"
974
		 * directive, but for reasons unclear and unknown, lint
975
		 * refuses to be assuaged in this case.  Fortunately, lint
976
		 * doesn't pretend to have solved the Halting Problem --
977
		 * and as soon as the format string is programmatic, it
978
		 * knows enough to shut up.
979
		 */
980
		const char *fmt = "?user ABI extensions: %b\n";
981
		cmn_err(CE_CONT, fmt, auxv_hwcap, FMT_AV_386);
982
	}
968 983

  
969 984
#if defined(_SYSCALL32_IMPL)
970 985
	auxv_hwcap32 = (auxv_hwcap32_include | cpu_hwcap_flags) &
......
986 1001
	auxv_hwcap32 |= AV_386_AHF;
987 1002
#endif
988 1003

  
989
	if (auxv_hwcap32_include || auxv_hwcap32_exclude)
990
		cmn_err(CE_CONT, "?32-bit user ABI extensions: %b\n",
991
		    auxv_hwcap32, FMT_AV_386);
1004
	if (auxv_hwcap32_include || auxv_hwcap32_exclude) {
1005
		/*
1006
		 * See the block comment in the cmn_err() of auxv_hwcap, above.
1007
		 */
1008
		const char *fmt = "?32-bit user ABI extensions: %b\n";
1009
		cmn_err(CE_CONT, fmt, auxv_hwcap32, FMT_AV_386);
1010
	}
992 1011
#endif
993 1012
}
994 1013

  
usr/src/uts/intel/sys/x86_archext.h
362 362
#define	X86FSET_PCLMULQDQ	32
363 363
#define	X86FSET_XSAVE		33
364 364
#define	X86FSET_AVX		34
365
#define	X86FSET_VMX		35
366
#define	X86FSET_SVM		36
365 367

  
366 368
/*
367 369
 * flags to patch tsc_read routine.
......
585 587

  
586 588
#if defined(_KERNEL) || defined(_KMEMUSER)
587 589

  
588
#define	NUM_X86_FEATURES	35
590
#define	NUM_X86_FEATURES	37
589 591
extern uchar_t x86_featureset[];
590 592

  
591 593
extern void free_x86_featureset(void *featureset);
    (1-1/1)