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Bug #12304

risc-v dis instruction alignment too restrictive

Added by Robert Mustacchi 7 days ago.

Status:
New
Priority:
Normal
Category:
lib - userland libraries
Start date:
Due date:
% Done:

90%

Estimated time:
Difficulty:
Medium
Tags:

Description

While reviewing the risc-v ISA docs, I discovered that I mistakenly over-restricted the alignment of instructions in dis. In particular, when using the compressed instruction set, the alignment of 32-bit instructions is in fact allowed to be 16-bit aligned and does not require 32-bit alignment. We should reduce this restriction in dis.

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