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Bug #13106

closed

clarify PPR transitions in bhyve vLAPIC

Added by Patrick Mooney about 1 year ago. Updated 11 months ago.

Status:
Closed
Priority:
Normal
Category:
bhyve
Start date:
Due date:
% Done:

100%

Estimated time:
Difficulty:
Medium
Tags:
bhyve
Gerrit CR:

Description

Between the complicated conditional logic for APICv vs. non-accelerated LAPIC emulation, and the TPR shadowing changes which were added to bhyve circa March 2020, it has become somewhat difficult to grasp how and when the value of the PPR in the virtual LAPIC is set. It would be valuable to make all of its value transitions clear, so that we know it is correct at all times. This will ensure that the guest can observe the correct value (via the LAPIC register) and we have the correct priority value to use for determining if an incoming interrupt should wake the guest.


Related issues

Related to illumos gate - Bug #13007: bhyve vlapic should set TMR on intr acceptClosedPatrick Mooney

Actions
Actions #1

Updated by Electric Monk about 1 year ago

  • Gerrit CR set to 835
Actions #2

Updated by Patrick Mooney 11 months ago

As this arose as part of the #13007 work, testing for it was covered under that wad.

Actions #3

Updated by Patrick Mooney 11 months ago

  • Related to Bug #13007: bhyve vlapic should set TMR on intr accept added
Actions #4

Updated by Electric Monk 11 months ago

  • Status changed from In Progress to Closed
  • % Done changed from 0 to 100

git commit c74a40a584c9d875009f725565896fd7e8ee38d6

commit  c74a40a584c9d875009f725565896fd7e8ee38d6
Author: Patrick Mooney <pmooney@pfmooney.com>
Date:   2020-11-24T20:30:25.000Z

    13007 bhyve vlapic should set TMR on intr accept
    13106 clarify PPR transitions in bhyve vLAPIC
    13132 VMX event injection can race in bhyve
    13259 SVM event injection can race in bhyve
    Reviewed by: Robert Mustacchi <rm@fingolfin.org>
    Reviewed by: Toomas Soome <tsoome@me.com>
    Approved by: Dan McDonald <danmcd@joyent.com>

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