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Bug #13108
closed
mlxcx fails to attach on system using pcplusmp after 12988
Status:
Closed
Priority:
High
Assignee:
-
Category:
driver - device drivers
Start date:
Due date:
% Done:
100%
Estimated time:
Difficulty:
Medium
Tags:
Gerrit CR:
Description
After updating to a driver which included the bits from 12988, an OmniOS user reported that the mlxcx driver was no longer attaching:
Sep 3 13:38:17 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 1 irq 0x2d vector 0x64 ioapic 0xff intin 0xff is bound to cpu 42 Sep 3 13:38:17 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 1 irq 0x2e vector 0x65 ioapic 0xff intin 0xff is bound to cpu 43 Sep 3 13:38:17 err mlxcx: [ID 439861 kern.warning] WARNING: mlxcx1: Failed to set interrupt priority to 7 for async interrupt vector Sep 3 13:38:17 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 0 irq 0x2d vector 0x64 ioapic 0xff intin 0xff is bound to cpu 44 Sep 3 13:38:17 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 0 irq 0x2e vector 0x65 ioapic 0xff intin 0xff is bound to cpu 45 Sep 3 13:38:17 err mlxcx: [ID 439861 kern.warning] WARNING: mlxcx0: Failed to set interrupt priority to 7 for async interrupt vector Sep 3 13:38:18 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 0 irq 0x2d vector 0x64 ioapic 0xff intin 0xff is bound to cpu 46 Sep 3 13:38:18 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 0 irq 0x2e vector 0x65 ioapic 0xff intin 0xff is bound to cpu 47 Sep 3 13:38:18 err mlxcx: [ID 439861 kern.warning] WARNING: mlxcx0: Failed to set interrupt priority to 7 for async interrupt vector Sep 3 13:38:18 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 1 irq 0x2d vector 0x64 ioapic 0xff intin 0xff is bound to cpu 0 Sep 3 13:38:18 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 1 irq 0x2e vector 0x65 ioapic 0xff intin 0xff is bound to cpu 1 Sep 3 13:38:18 err mlxcx: [ID 439861 kern.warning] WARNING: mlxcx1: Failed to set interrupt priority to 7 for async interrupt vector Sep 3 13:38:18 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 0 irq 0x2d vector 0x64 ioapic 0xff intin 0xff is bound to cpu 2 Sep 3 13:38:18 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 0 irq 0x2e vector 0x65 ioapic 0xff intin 0xff is bound to cpu 3 Sep 3 13:38:18 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 1 irq 0x2f vector 0x66 ioapic 0xff intin 0xff is bound to cpu 4 Sep 3 13:38:18 err pcplusmp: [ID 805372 kern.info] pcplusmp: pciex15b3,1013 (mlxcx) instance 1 irq 0x30 vector 0x67 ioapic 0xff intin 0xff is bound to cpu 5 Sep 3 13:38:18 err mlxcx: [ID 439861 kern.warning] WARNING: mlxcx0: Failed to set interrupt priority to 7 for async interrupt vector Sep 3 13:38:18 err mlxcx: [ID 439861 kern.warning] WARNING: mlxcx1: Failed to set interrupt priority to 7 for async interrupt vector
A dtrace run tracing calls under ddi_intr_set_pri() shows that apic_navail_vector() is returning 0.
21 -> i_ddi_intr_ops 21 -> pcieb_intr_ops 21 -> pcieb_plat_intr_ops 21 -> i_ddi_intr_ops 21 -> npe_intr_ops 21 -> pci_common_intr_ops 21 -> pci_intx_get_ispec 21 -> ddi_get_parent_data 21 <- ddi_get_parent_data -2449073009408 21 <- pci_intx_get_ispec -2449073009360 21 -> apic_intr_ops 21 -> apic_alloc_msix_vectors 21 -> apic_navail_vector 21 <- apic_navail_vector 0 21 <- apic_alloc_msix_vectors 0 21 <- apic_intr_ops 4294967295 21 <- pci_common_intr_ops 4294967295 21 <- npe_intr_ops 4294967295 21 <- i_ddi_intr_ops 4294967295 21 <- pcieb_plat_intr_ops 4294967295 21 <- pcieb_intr_ops 4294967295 21 <- i_ddi_intr_ops 4294967295 21 <- ddi_intr_set_pri Return 4294967295 @ 6e
Interrupt allocation for this system (when booted to the previous kernel) shows:
root@err:~# mdb -ke ::interrupts IRQ Vect IPL Bus Trg Type CPU Share APIC/INT# ISR(s) 9 0x81 9 PCI Lvl Fixed 1 1 0x0/0x9 acpi_wrapper_isr 16 0x32 4 PCI Edg MSI 8 1 - pcieb_intr_handler 17 0x85 7 PCI Edg MSI 9 1 - pcieb_intr_handler 18 0x33 4 PCI Edg MSI 10 1 - pcieb_intr_handler 19 0x86 7 PCI Edg MSI 11 1 - pcieb_intr_handler 20 0x34 4 PCI Edg MSI 12 1 - pcieb_intr_handler 21 0x87 7 PCI Edg MSI 13 1 - pcieb_intr_handler 22 0x35 4 PCI Edg MSI 14 1 - pcieb_intr_handler 23 0x88 7 PCI Edg MSI 15 1 - pcieb_intr_handler 24 0x36 4 PCI Edg MSI 16 1 - pcieb_intr_handler 25 0x89 7 PCI Edg MSI 17 1 - pcieb_intr_handler 26 0x8a 9 PCI Edg MSI-X 18 1 - xhci_intr 27 0x8b 9 PCI Edg MSI-X 19 1 - xhci_intr 28 0x37 4 PCI Edg MSI 20 1 - pcieb_intr_handler 29 0x8c 7 PCI Edg MSI 21 1 - pcieb_intr_handler 30 0x38 4 PCI Edg MSI 22 1 - pcieb_intr_handler 31 0x8d 7 PCI Edg MSI 23 1 - pcieb_intr_handler 32 0x20 2 Edg IPI all 1 - cmi_cmci_trap 33 0x39 4 PCI Edg MSI 24 1 - pcieb_intr_handler 34 0x8e 7 PCI Edg MSI 25 1 - pcieb_intr_handler 35 0x3a 4 PCI Edg MSI 26 1 - pcieb_intr_handler 36 0x8f 7 PCI Edg MSI 27 1 - pcieb_intr_handler 37 0x3b 4 PCI Edg MSI 28 1 - pcieb_intr_handler 38 0x60 6 PCI Edg MSI-X 29 1 - mlxcx_intr_async 39 0x61 6 PCI Edg MSI-X 30 1 - mlxcx_intr_n 40 0x62 6 PCI Edg MSI-X 31 1 - mlxcx_intr_async 41 0x63 6 PCI Edg MSI-X 32 1 - mlxcx_intr_n 42 0x41 5 PCI Edg MSI 33 1 - mptsas_intr 43 0x64 6 PCI Edg MSI-X 34 1 - igb_intr_tx_other 44 0x65 6 PCI Edg MSI-X 35 1 - igb_intr_rx 45 0x66 6 PCI Edg MSI-X 36 1 - igb_intr_tx_other 46 0x67 6 PCI Edg MSI-X 37 1 - igb_intr_rx 47 0x42 5 PCI Edg MSI 40 1 - ahci_intr 48 0x43 5 PCI Edg MSI 41 1 - ahci_intr 160 0xa0 0 Edg IPI all 0 - pir_ipi 161 0xa1 0 Edg IPI all 0 - poke_cpu 208 0xd0 14 Edg IPI all 1 - kcpc_hw_overflow_intr 209 0xd1 14 Edg IPI all 1 - cbe_fire 210 0xd3 14 Edg IPI all 1 - cbe_fire 240 0xe0 15 Edg IPI all 1 - xc_serv 241 0xe1 15 Edg IPI all 1 - apic_error_intr 248 0x82 7 PCI Edg MSI 2 1 - pcieb_intr_handler 249 0x40 5 PCI Edg MSI 3 1 - mptsas_intr 250 0x30 4 PCI Edg MSI 4 1 - pcieb_intr_handler 251 0x83 7 PCI Edg MSI 5 1 - pcieb_intr_handlersetspl: 252 0x31 4 PCI Edg MSI 6 1 - pcieb_intr_handler 253 0x84 7 PCI Edg MSI 7 1 - pcieb_intr_handler
root@err:~# mdb -ke ::interrupts | awk '{print $3}' | sort | uniq -c
2 0
3 14
2 15
1 2
12 4
4 5
8 6
12 7
3 9
There are 12 entries at IPL 7.
Setting apix:apix_hw_chk_enable=0 in /etc/system has enabled the system to boot with the mlxcx driver attached.
Related issues
Updated by Andy Fiddaman almost 2 years ago
- Related to Bug #12988: potential hang in mlxcx when async and ring vectors end up on same CPU added
Updated by Andy Fiddaman almost 2 years ago
For completeness, here's ::interrupts when booted with APIX
root@err:~# mdb -ke ::interrupts CPU/Vect IRQ IPL Bus Trg Type Share APIC/INT# ISR 0/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 1/0x20 9 9 PCI Lvl Fixed 1 0x0/0x9 acpi_wrapper_isr 1/0x21 - 5 PCI Edg MSI 1 - mptsas_intr 2/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 3/0x20 - 5 PCI Edg MSI 1 - mptsas_intr 4/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 5/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 6/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 6/0x21 - 5 PCI Edg MSI 1 - ahci_intr 7/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 7/0x21 - 5 PCI Edg MSI 1 - ahci_intr 8/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 8/0x21 - 6 PCI Edg MSI-X 1 - igb_intr_tx_other 9/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 9/0x21 - 6 PCI Edg MSI-X 1 - igb_intr_rx 10/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 10/0x21 - 6 PCI Edg MSI-X 1 - igb_intr_tx_other 11/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 11/0x21 - 6 PCI Edg MSI-X 1 - igb_intr_rx 12/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 13/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 14/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 15/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 16/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 17/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 18/0x20 - 9 PCI Edg MSI-X 1 - xhci_intr 19/0x20 - 9 PCI Edg MSI-X 1 - xhci_intr 20/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 21/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 22/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 23/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 24/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 25/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 26/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 27/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 28/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 29/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 30/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 31/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 32/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 33/0x20 - 7 PCI Edg MSI-X 1 - mlxcx_intr_async 34/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 35/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 36/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 37/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 38/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 39/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 40/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 41/0x20 - 7 PCI Edg MSI-X 1 - mlxcx_intr_async 42/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 43/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 44/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 45/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 46/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 47/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n all/0xf0 - 11 - Edg IPI 0 - pir_ipi all/0xf1 - 15 - Edg IPI 1 - xc_serv all/0xf2 - 11 - Edg IPI 0 - poke_cpu all/0xf3 - 14 - Edg IPI 1 - kcpc_hw_overflow_intr all/0xf4 - 15 - Edg IPI 1 - apic_error_intr all/0xf5 - 2 - Edg IPI 1 - cmi_cmci_trap all/0xf6 - 14 - Edg IPI 1 - cbe_fire all/0xf7 - 14 - Edg IPI 1 - cbe_fire
Updated by Robert Mustacchi almost 2 years ago
- Subject changed from mlxcx fails to attach on system using APIC after 12988 to mlxcx fails to attach on system using pcplusmp after 12988
Updated by Robert Mustacchi almost 2 years ago
So, the fundamental problem here is that in the older pcplusmp PSM module, the all interrupt vectors are treated as global. This means that we only have a single CPUs worth of vectors. Different priorities are associated with different groups of vectors. The following table from apic.c is useful in understanding this:
111 /*
112 * The following vector assignments influence the value of ipltopri and
113 * vectortoipl. Note that vectors 0 - 0x1f are not used. We can program
114 * idle to 0 and IPL 0 to 0xf to differentiate idle in case
115 * we care to do so in future. Note some IPLs which are rarely used
116 * will share the vector ranges and heavily used IPLs (5 and 6) have
117 * a wide range.
118 *
119 * This array is used to initialize apic_ipls[] (in apic_init()).
120 *
121 * IPL Vector range. as passed to intr_enter
122 * 0 none.
123 * 1,2,3 0x20-0x2f 0x0-0xf
124 * 4 0x30-0x3f 0x10-0x1f
125 * 5 0x40-0x5f 0x20-0x3f
126 * 6 0x60-0x7f 0x40-0x5f
127 * 7,8,9 0x80-0x8f 0x60-0x6f
128 * 10 0x90-0x9f 0x70-0x7f
129 * 11 0xa0-0xaf 0x80-0x8f
130 * ... ...
131 * 15 0xe0-0xef 0xc0-0xcf
132 * 15 0xf0-0xff 0xd0-0xdf
133 */
134 uchar_t apic_vectortoipl[APIC_AVAIL_VECTOR / APIC_VECTOR_PER_IPL] = {
135 3, 4, 5, 5, 6, 6, 9, 10, 11, 12, 13, 14, 15, 15
136 };
The thing to note here is that IPLs 7, 8, and 9 share a total of 16 interrupts. If we look at this user, there were already a lot of interrupts before things were moved, in particular, there were a total of 15/16 interrupts allocated to the shared IPL between 7, 8, and 9. 12 to level 7 and 3 to level 9. In this case mlxcx wanted to move two vectors (due to two instances) to level 7, which would have required a total of 17 vectors at those priorities, which doesn't exist.
Looking at this, there are a couple of different paths. First, it's notable what is at level 7 and 9. In particular all the host bridges, memory controllers, USB controllers, etc. While historically I've encountered problems with too many interrupts at level 5 or 6 when there are a lot of devices, with the large increase in PCIe root complexes, this is starting to cause these other regions to get tight.
Effectively, there are three options on how to deal with this particular issue, some of which don't really address the problem:
1. We can rely on the fact that when #12967 is integrated, this system in particular will no longer have any concerns with this as it will switch to the apix PSM module. That said, that doesn't fundamentally solve this as it could be possible for a system with the pcplusmp to end up here.
2. We could cause the mlxcx driver to search the priority space more when it hits a problem. It's still possible we could run out of IPLs, but that seems less likely. For example, today it tries going up or down once, based on IPL values, but if it fails it could try going doing other things.
3. We could change the mlxcx driver to no longer require separate priorities.
4. We could actually try and change the IPL allocation space on pcplusmp. In particular, there are a lot of vectors for everything above lock level. However, there's nothing allocated on this system in the 10-13 range.
Updated by Andy Fiddaman almost 2 years ago
- Gerrit CR deleted (
895)
I coded up an implementation for option 2 as presented by Robert. Given the constraint that the async vector needs to be a higher priority than the ring handlers, I search down until I find a priority which has availability, then attempt to set the ring handler priority to a level below that. Since pcplusmp only allows two vectors, this won't result in different rings having different priorities.
Since IPLs 7, 8 & 9 share a pool of vectors, it does not seem worthwhile to search upwards at all.
Updated by Andy Fiddaman almost 2 years ago
The affected user tested an updated driver with both the pcplusmp and apix modules and it worked fine.
Interrupt allocation in pmplusmp:
IRQ Vect IPL Bus Trg Type CPU Share APIC/INT# ISR(s) 9 0x81 9 PCI Lvl Fixed 1 1 0x0/0x9 acpi_wrapper_isr 16 0x32 4 PCI Edg MSI 8 1 - pcieb_intr_handler 17 0x85 7 PCI Edg MSI 9 1 - pcieb_intr_handler 18 0x33 4 PCI Edg MSI 10 1 - pcieb_intr_handler 19 0x86 7 PCI Edg MSI 11 1 - pcieb_intr_handler 20 0x34 4 PCI Edg MSI 12 1 - pcieb_intr_handler 21 0x87 7 PCI Edg MSI 13 1 - pcieb_intr_handler 22 0x35 4 PCI Edg MSI 14 1 - pcieb_intr_handler 23 0x88 7 PCI Edg MSI 15 1 - pcieb_intr_handler 24 0x36 4 PCI Edg MSI 16 1 - pcieb_intr_handler 25 0x89 7 PCI Edg MSI 17 1 - pcieb_intr_handler 26 0x8a 9 PCI Edg MSI-X 18 1 - xhci_intr 27 0x8b 9 PCI Edg MSI-X 19 1 - xhci_intr 28 0x37 4 PCI Edg MSI 20 1 - pcieb_intr_handler 29 0x8c 7 PCI Edg MSI 21 1 - pcieb_intr_handler 30 0x38 4 PCI Edg MSI 22 1 - pcieb_intr_handler 31 0x8d 7 PCI Edg MSI 23 1 - pcieb_intr_handler 32 0x20 2 Edg IPI all 1 - cmi_cmci_trap 33 0x39 4 PCI Edg MSI 24 1 - pcieb_intr_handler 34 0x8e 7 PCI Edg MSI 25 1 - pcieb_intr_handler 35 0x3a 4 PCI Edg MSI 26 1 - pcieb_intr_handler 36 0x8f 7 PCI Edg MSI 27 1 - pcieb_intr_handler 37 0x3b 4 PCI Edg MSI 28 1 - pcieb_intr_handler 38 0x60 6 PCI Edg MSI-X 29 1 - mlxcx_intr_async 39 0x42 5 PCI Edg MSI 32 1 - mptsas_intr 40 0x41 5 PCI Edg MSI-X 31 1 - mlxcx_intr_n 41 0x61 6 PCI Edg MSI-X 33 1 - mlxcx_intr_async 42 0x62 6 PCI Edg MSI-X 36 1 - igb_intr_tx_other 43 0x43 5 PCI Edg MSI-X 35 1 - mlxcx_intr_n 44 0x63 6 PCI Edg MSI-X 37 1 - igb_intr_rx 45 0x64 6 PCI Edg MSI-X 38 1 - igb_intr_tx_other 46 0x65 6 PCI Edg MSI-X 39 1 - igb_intr_rx 160 0xa0 0 Edg IPI all 0 - pir_ipi 161 0xa1 0 Edg IPI all 0 - poke_cpu 208 0xd0 14 Edg IPI all 1 - kcpc_hw_overflow_intr 209 0xd1 14 Edg IPI all 1 - cbe_fire 210 0xd3 14 Edg IPI all 1 - cbe_fire 240 0xe0 15 Edg IPI all 1 - xc_serv 241 0xe1 15 Edg IPI all 1 - apic_error_intr 248 0x82 7 PCI Edg MSI 2 1 - pcieb_intr_handler 249 0x40 5 PCI Edg MSI 3 1 - mptsas_intr 250 0x30 4 PCI Edg MSI 4 1 - pcieb_intr_handler 251 0x83 7 PCI Edg MSI 5 1 - pcieb_intr_handler 252 0x31 4 PCI Edg MSI 6 1 - pcieb_intr_handler 253 0x84 7 PCI Edg MSI 7 1 - pcieb_intr_handler
and with apix:
CPU/Vect IRQ IPL Bus Trg Type Share APIC/INT# ISR 0/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 1/0x20 9 9 PCI Lvl Fixed 1 0x0/0x9 acpi_wrapper_isr 1/0x21 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 2/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 2/0x21 - 6 PCI Edg MSI-X 1 - igb_intr_tx_other 3/0x20 - 5 PCI Edg MSI 1 - mptsas_intr 3/0x21 - 6 PCI Edg MSI-X 1 - igb_intr_rx 4/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 4/0x21 - 6 PCI Edg MSI-X 1 - igb_intr_tx_other 5/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 5/0x21 - 6 PCI Edg MSI-X 1 - igb_intr_rx 6/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 7/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 8/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 9/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 10/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 11/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 12/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 13/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 14/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 15/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 16/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 17/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 18/0x20 - 9 PCI Edg MSI-X 1 - xhci_intr 19/0x20 - 9 PCI Edg MSI-X 1 - xhci_intr 20/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 21/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 22/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 23/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 24/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 25/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 26/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 27/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 28/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 29/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 30/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 31/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler 32/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler 33/0x20 - 7 PCI Edg MSI-X 1 - mlxcx_intr_async 34/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 35/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 36/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 37/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 38/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 39/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 40/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 41/0x20 - 5 PCI Edg MSI 1 - mptsas_intr 42/0x20 - 7 PCI Edg MSI-X 1 - mlxcx_intr_async 43/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 44/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 45/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 46/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n 47/0x20 - 6 PCI Edg MSI-X 1 - mlxcx_intr_n all/0xf0 - 11 - Edg IPI 0 - pir_ipi all/0xf1 - 15 - Edg IPI 1 - xc_serv all/0xf2 - 11 - Edg IPI 0 - poke_cpu all/0xf3 - 14 - Edg IPI 1 - kcpc_hw_overflow_intr all/0xf4 - 15 - Edg IPI 1 - apic_error_intr all/0xf5 - 2 - Edg IPI 1 - cmi_cmci_trap all/0xf6 - 14 - Edg IPI 1 - cbe_fire all/0xf7 - 14 - Edg IPI 1 - cbe_fire
Updated by Electric Monk almost 2 years ago
- Status changed from New to Closed
- % Done changed from 0 to 100
git commit 260b78324e5b8479cc94f897a36e996f026c3fef
commit 260b78324e5b8479cc94f897a36e996f026c3fef
Author: Andy Fiddaman <omnios@citrus-it.co.uk>
Date: 2020-09-17T09:36:52.000Z
13108 mlxcx fails to attach on system using pcplusmp after 12988
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Reviewed by: Paul Winder <paul@winder.uk.net>
Approved by: Dan McDonald <danmcd@joyent.com>
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