illumos gate

Very similar to what is described in #13132, the event injection logic for bhyve on AMD's SVM suffers from a race where notifications for new vCPU events may be missed prior to VM entry, thanks to interrupts being enabled while event injection occurs. Again, adaptive mutexes used by virtual device logic prevents the existing event injection code from running under the host-CPU-interrupts-disabled region. A difference on bhyve for AMD is that the GIF (global interrupt flag) is used instead of merely clearing IF in rflags. With the GIF cleared, even host SMI and NMI events are held queued, so sleeping with the host CPU in such a state would be a true recipe for disaster. Like described in #13132, the event injection should be broken up so that the portions requiring host interrupts remain enabled have a corresponding (lockless) re-check after interrupts are disabled. This will allow any events which arrived in the mean time to be processed in a timely fashion.