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Bug #13275

bhyve needs richer INIT/SIPI support

Added by Patrick Mooney 27 days ago. Updated 27 days ago.

Status:
In Progress
Priority:
Normal
Category:
bhyve
Start date:
Due date:
% Done:

0%

Estimated time:
Difficulty:
Medium
Tags:
Gerrit CR:

Description

Today, bhyve's support for sending INIT and SIPI messages from the APIC is extremely limited. It only supports single-destination messages originating from the BSP. Furthermore, it has no support for re-INIT-ing a vCPU after it has started. In order to run newer versions of the UEFI ROM, or anything else that depends on the vLAPIC meeting its architecturally defined expectations, bhyve should support more complex INIT/SIPI actions. This means both re-INIT-ing (and subsequently SIPI-ing) vCPUs while the system is running, as well as being able to use the all-excluding-self destination shorthand.

#1

Updated by Electric Monk 27 days ago

  • Gerrit CR set to 1035

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