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Bug #13375

closed

bhyve should expose invariant TSC

Added by Patrick Mooney 12 months ago. Updated 10 months ago.

Status:
Closed
Priority:
Normal
Category:
bhyve
Start date:
Due date:
% Done:

100%

Estimated time:
Difficulty:
Medium
Tags:
Gerrit CR:

Description

When bhyve was ported to illumos, the logic for exposing the invariant TSC property was skipped. A TSC is considered invariant when its frequency will not be effected by changes in CPU state such as P-state transitions. Presently, illumos has detection logic in the SpeedStep and PowerNow drivers to preclude their use if invariant TSC functionality is not present. Because of that, and because illumos bhyve does not support host suspend/resume, it should be a reasonable assumption that the TSC will run at its measured frequency without interruption. Any skew between CPU TSC values is measure during boot and available to bhyve to configure VMX/SVM TSC offsets so there is no perceived difference in the guest as a vCPU migrates between physical CPUs.

Actions #1

Updated by Electric Monk 12 months ago

  • Gerrit CR set to 1110
Actions #2

Updated by Patrick Mooney 10 months ago

Despite the fact that illumos disables power features that should make it safe to expose an invariant TSC to guests on physical CPUs which lack the feature, that was decided to be too excessive for this change. It was updated to only expose that feature if the physical CPU possess it. There was an added optional override variable which could be used to get the full unconditional exposition if required for development purposes.

With all that said, this was tested on Intel (Ivy Bridge) and AMD (Rome) hardware to check guest behavior. Both CPUs support invariant TSC, and so they should pass it on to the guest. On Linux, that can be checked by looking for constant_tsc in the /proc/cpuinfo flags list. It was indeed listed there on both systems.

Actions #3

Updated by Patrick Mooney 10 months ago

With this in place, an OpenBSD guest detected the invariant TSC and, for the first time I can remember, opted to use the TSC as its time source (as opposed to being irritated about its skew, and choosing something else).

Actions #4

Updated by Patrick Mooney 10 months ago

This also behaved normally in the typical guest OS smoke test battery on AMD and Intel.

Actions #5

Updated by Electric Monk 10 months ago

  • Status changed from In Progress to Closed
  • % Done changed from 0 to 100

git commit 9250eb132f1fc3950c838b7a5746f1bcdac7eba1

commit  9250eb132f1fc3950c838b7a5746f1bcdac7eba1
Author: Patrick Mooney <pmooney@pfmooney.com>
Date:   2021-02-09T04:09:15.000Z

    13375 bhyve should expose invariant TSC
    13381 support TSC offsets on AMD bhyve
    13382 consolidate MSR emulation in bhyve
    Reviewed by: Andy Fiddaman <andy@omnios.org>
    Reviewed by: Jason King <jason.king@joyent.com>
    Reviewed by: Mike Zeller <mike.zeller@joyent.com>
    Reviewed by: Robert Mustacchi <rm@fingolfin.org>
    Approved by: Dan McDonald <danmcd@joyent.com>

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