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Feature #13382

closed

consolidate MSR emulation in bhyve

Added by Patrick Mooney over 1 year ago. Updated over 1 year ago.

Status:
Closed
Priority:
Normal
Category:
bhyve
Start date:
Due date:
% Done:

100%

Estimated time:
Difficulty:
Medium
Tags:
Gerrit CR:

Description

There is a bunch of MSR emulation which is duplicated in the SVM and VMX portions of the code.
Those parts which are general to x86 could be consolidated into vendor independent logic.

The obvious examples are the TSC MSR, and the MTRR "emulation" (reads all 0s).

Actions #1

Updated by Patrick Mooney over 1 year ago

  • Tracker changed from Bug to Feature
Actions #2

Updated by Electric Monk over 1 year ago

  • Gerrit CR set to 1110
Actions #3

Updated by Patrick Mooney over 1 year ago

While this was primarily code reorganization, it's important to verify that the new logic properly matches the old behavior. I dtraced the vm_handle_rdmsr and vm_handle_wrmsr functions to observe which MSRs were being covered by the in-kernel logic, and which were being deferred to userspace. Access to MTRR and MCG-related MSRs was being handled in-kernel, just like it had been before.

In addition to that specific tracing, the normal battery of guest OS smoke testing was done on AMD and Intel hardware.

Actions #4

Updated by Electric Monk over 1 year ago

  • Status changed from In Progress to Closed
  • % Done changed from 0 to 100

git commit 9250eb132f1fc3950c838b7a5746f1bcdac7eba1

commit  9250eb132f1fc3950c838b7a5746f1bcdac7eba1
Author: Patrick Mooney <pmooney@pfmooney.com>
Date:   2021-02-09T04:09:15.000Z

    13375 bhyve should expose invariant TSC
    13381 support TSC offsets on AMD bhyve
    13382 consolidate MSR emulation in bhyve
    Reviewed by: Andy Fiddaman <andy@omnios.org>
    Reviewed by: Jason King <jason.king@joyent.com>
    Reviewed by: Mike Zeller <mike.zeller@joyent.com>
    Reviewed by: Robert Mustacchi <rm@fingolfin.org>
    Approved by: Dan McDonald <danmcd@joyent.com>

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