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Bug #14734

open

pcieadm decodes expansion ROM address incorrectly

Added by Thirteen Oxide 27 days ago. Updated 20 days ago.

Status:
New
Priority:
Low
Category:
cmd - userland programs
Start date:
Due date:
% Done:

0%

Estimated time:
Difficulty:
Bite-size
Tags:
Gerrit CR:

Description

The expansion ROM BAR is defined such that bits [31:11] contain bits [31:11] of the ROM address, so that a register containing 0xa8180001 would describe an enabled ROM decode for addresses starting from 0xa8180000; if the last bit were instead 0 the address would have the same meaning but the BAR would be disabled. Instead we see:

  Expansion ROM: 0xa8180000
    |--> Enable: disabled (0x0)
    |--> Base Address: 0x2a060000000

This is because we're taking [31:11] as an integer and then shifting it left 21 in pcieadm_regdef_exprom. We need only shift it left 11.

Actions #1

Updated by Robert Mustacchi 22 days ago

  • Assignee set to Robert Mustacchi
Actions #2

Updated by Robert Mustacchi 21 days ago

I fixed this and added the recent fields that were in the PCIe gen 5 spec here. With this fixed here's what you now see:

$ for f in *.pci; do ../pcieadm show-cfgspace -f $f header0.rom; done
...
Device c1-00-00.pci -- Type 0 Header
  Expansion ROM: 0x96800000
    |--> Enable: disabled (0x0)
    |--> Validation Status: not supported (0x0)
    |--> Validation Details: 0x0
    |--> Base Address: 0x96800000
Device c1-00-01.pci -- Type 0 Header
  Expansion ROM: 0x96680000
    |--> Enable: disabled (0x0)
    |--> Validation Status: not supported (0x0)
    |--> Validation Details: 0x0
    |--> Base Address: 0x96680000
Device c1-00-02.pci -- Type 0 Header
  Expansion ROM: 0x96500000
    |--> Enable: disabled (0x0)
    |--> Validation Status: not supported (0x0)
    |--> Validation Details: 0x0
    |--> Base Address: 0x96500000
Actions #3

Updated by Electric Monk 20 days ago

  • Gerrit CR set to 2187
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