Feature #8534: Want AVX-512 Support
better handling for AMD-specifc *save_ctxt FP exceptions
|Assignee:||Jerry Jelinek||% Done:|
In xsave_ctxt we have this block which was copied directly from fpxsave_ctxt.
/* * (see notes above about "exception pointers") * TODO: does it apply to any machine that uses xsave? */ btw $7, FXSAVE_STATE_FSW(%rdi) /* Test saved ES bit */ jnc 0f /* jump if ES = 0 */ fnclex /* clear pending x87 exceptions */ 0: ffree %st(7) /* clear tag bit to remove possible stack overflow */ fildl .fpzero_const(%rip) /* dummy load changes all exception pointers */
I did some research and that only applies to the fxsave handling on AMD K7 and K8 CPUs. After more research, it is not completely clear that the AMD behavior around floating-point zero pointer handling is disjoint from any of the save context handling. I'm going to check for that AMD-specific feature and handle that explicitly instead of the current approach where we blindly do this for every save context save.
#1 Updated by Electric Monk 11 months ago
- Status changed from New to Closed
commit 088d69f878cf3fb57556357236ef8e1c8f9d893e Author: Jerry Jelinek <firstname.lastname@example.org> Date: 2017-08-16T17:06:52.000Z 8534 Want AVX-512 Support 8535 kernel cpuid support for new processors 8536 xsave area should size dynamically, based on CPU features 8537 rtld needs to learn about AVX512 8538 add support for xsaveopt for improved context switching 8539 better handling for AMD-specifc *save_ctxt FP exceptions Reviewed by: Robert Mustacchi <email@example.com> Reviewed by: Toomas Soome <firstname.lastname@example.org> Approved by: Richard Lowe <email@example.com>
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