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Feature #9105

smbios(1M) processor table info can be confusing

Added by Robert Mustacchi over 1 year ago. Updated about 1 year ago.

Status:
Closed
Priority:
Normal
Category:
cmd - userland programs
Start date:
2018-02-13
Due date:
% Done:

100%

Estimated time:
Difficulty:
Medium
Tags:

Description

The smbios processor information looks like:

[root@broadwell ~]# smbios -t4
ID    SIZE TYPE
1024  94   SMB_TYPE_PROCESSOR (type 4) (processor)

  Manufacturer: Intel
  Version: Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
  Location Tag: CPU1

  Family: 179 (Intel Xeon)
  Family Ext: 179 (Intel Xeon)
  CPUID: 0xbfebfbff000406f1
  Type: 3 (central processor)
  Socket Upgrade: 43 (LGA2011-3)
  Socket Status: Populated
  Processor Status: 1 (enabled)
  Supported Voltages: 1.3V
  Core Count: 14
  Cores Enabled: 14
  Thread Count: 28
  Processor Characteristics: 0xfc
        SMB_PRC_64BIT (64-bit capable)
        SMB_PRC_MC (multi-core)
        SMB_PRC_HT (hardware thread)
        SMB_PRC_NX (execution protection)
        SMB_PRC_VT (enhanced virtualization)
        SMB_PRC_PM (power/performance control)
  External Clock Speed: Unknown
  Maximum Speed: 4000MHz
  Current Speed: 2600MHz
         L1 Cache: 1792
         L2 Cache: 1793
         L3 Cache: 1794

Note that the caches just have numbers. These are actually references to other entries. We should improve the text here.

Ultimately, what I decided to do here was to add the additional text handle, to hopefully make it clearer that this was the case. To confirm this I went through and looked at the smbios images from several systems and printed it out in the new world. Here's what one used to look like:

[rm@122fff4d-b9d7-cd35-b1f9-f9e6eca3362a ~/src/tiresias/projects/illumos/usr/src/cmd/smbios]$ smbios -t4 MS934130.out 
ID    SIZE TYPE
148   104  SMB_TYPE_PROCESSOR (type 4) (processor)

  Manufacturer: Intel
  Version: Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
  Location Tag: SOCKET 0

  Family: 179 (Intel Xeon)
  Family Ext: 179 (Intel Xeon)
  CPUID: 0xbfebfbff000406f1
  Type: 3 (central processor)
  Socket Upgrade: 43 (LGA2011-3)
  Socket Status: Populated
  Processor Status: 1 (enabled)
  Supported Voltages: 0.0V
  Core Count: 14
  Cores Enabled: 14
  Thread Count: 28
  Processor Characteristics: 0xfc
        SMB_PRC_64BIT (64-bit capable)
        SMB_PRC_MC (multi-core)
        SMB_PRC_HT (hardware thread)
        SMB_PRC_NX (execution protection)
        SMB_PRC_VT (enhanced virtualization)
        SMB_PRC_PM (power/performance control)
  External Clock Speed: Unknown
  Maximum Speed: 3600MHz
  Current Speed: 2600MHz
         L1 Cache: 145
         L2 Cache: 146
         L3 Cache: 147

ID    SIZE TYPE
152   104  SMB_TYPE_PROCESSOR (type 4) (processor)

  Manufacturer: Intel
  Version: Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
  Location Tag: SOCKET 1

  Family: 179 (Intel Xeon)
  Family Ext: 179 (Intel Xeon)
  CPUID: 0xbfebfbff000406f1
  Type: 3 (central processor)
  Socket Upgrade: 43 (LGA2011-3)
  Socket Status: Populated
  Processor Status: 1 (enabled)
  Supported Voltages: 0.0V
  Core Count: 14
  Cores Enabled: 14
  Thread Count: 28
  Processor Characteristics: 0xfc
        SMB_PRC_64BIT (64-bit capable)
        SMB_PRC_MC (multi-core)
        SMB_PRC_HT (hardware thread)
        SMB_PRC_NX (execution protection)
        SMB_PRC_VT (enhanced virtualization)
        SMB_PRC_PM (power/performance control)
  External Clock Speed: Unknown
  Maximum Speed: 3600MHz
  Current Speed: 2600MHz
         L1 Cache: 149
         L2 Cache: 150
         L3 Cache: 151

And here's what it now looks like:

[rm@122fff4d-b9d7-cd35-b1f9-f9e6eca3362a ~/src/tiresias/projects/illumos/usr/src/cmd/smbios]$ LD_PRELOAD_32=../../lib/libsmbios/i386/libsmbios.so.1 ./smbios -t4 MS934130.out 
ID    SIZE TYPE
148   104  SMB_TYPE_PROCESSOR (type 4) (processor)

  Manufacturer: Intel
  Version: Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
  Location Tag: SOCKET 0

  Family: 179 (Intel Xeon)
  Family Ext: 179 (Intel Xeon)
  CPUID: 0xbfebfbff000406f1
  Type: 3 (central processor)
  Socket Upgrade: 43 (LGA2011-3)
  Socket Status: Populated
  Processor Status: 1 (enabled)
  Supported Voltages: 0.0V
  Core Count: 14
  Cores Enabled: 14
  Thread Count: 28
  Processor Characteristics: 0xfc
        SMB_PRC_64BIT (64-bit capable)
        SMB_PRC_MC (multi-core)
        SMB_PRC_HT (hardware thread)
        SMB_PRC_NX (execution protection)
        SMB_PRC_VT (enhanced virtualization)
        SMB_PRC_PM (power/performance control)
  External Clock Speed: Unknown
  Maximum Speed: 3600MHz
  Current Speed: 2600MHz
  L1 Cache Handle: 145
  L2 Cache Handle: 146
  L3 Cache Handle: 147

ID    SIZE TYPE
152   104  SMB_TYPE_PROCESSOR (type 4) (processor)

  Manufacturer: Intel
  Version: Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
  Location Tag: SOCKET 1

  Family: 179 (Intel Xeon)
  Family Ext: 179 (Intel Xeon)
  CPUID: 0xbfebfbff000406f1
  Type: 3 (central processor)
  Socket Upgrade: 43 (LGA2011-3)
  Socket Status: Populated
  Processor Status: 1 (enabled)
  Supported Voltages: 0.0V
  Core Count: 14
  Cores Enabled: 14
  Thread Count: 28
  Processor Characteristics: 0xfc
        SMB_PRC_64BIT (64-bit capable)
        SMB_PRC_MC (multi-core)
        SMB_PRC_HT (hardware thread)
        SMB_PRC_NX (execution protection)
        SMB_PRC_VT (enhanced virtualization)
        SMB_PRC_PM (power/performance control)
  External Clock Speed: Unknown
  Maximum Speed: 3600MHz
  Current Speed: 2600MHz
  L1 Cache Handle: 149
  L2 Cache Handle: 150
  L3 Cache Handle: 151

Note, the indentation issues are due to a different bug.

History

#1

Updated by Electric Monk about 1 year ago

  • Status changed from New to Closed

git commit 32ece1f96d76b7ae0165091c2bc2a3cdce36971b

commit  32ece1f96d76b7ae0165091c2bc2a3cdce36971b
Author: Robert Mustacchi <rm@joyent.com>
Date:   2018-05-24T17:13:14.000Z

    9104 smbios(1M) should display PSU info
    9105 smbios(1M) processor table info can be confusing
    Reviewed by: Tim Kordas <tim.kordas@joyent.com>
    Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
    Reviewed by: Toomas Soome <tsoome@me.com>
    Approved by: Richard Lowe <richlowe@richlowe.net>

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